WeEn-Semiconductors-OT407-116

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WeEn-Semiconductors-OT407-116
OT407  
Four-quadrant triac, enhanced noise immunity  
Rev. 01 — 19 May 2008  
Product data sheet  
1. Product
 
profile  
1.1 General
 
description  
Passivated sensitive gate triac in a SOT54A (wide pitch) plastic package  
1.2 Features  
I
Sensitive gate  
I
Gate triggering in four quadrants  
I
Direct interfacing to low power gate drive  
circuits  
I
Direct interfacing to logic level ICs  
I
Enhanced immunity to voltage  
I
High blocking voltage to 800 V  
transients and noise  
1.3 Applications  
I
Home appliances  
I
Low power motor control  
I
Low power loads in industrial process  
control  
I
Low power AC fan speed controllers  
1.4 Quick
 
reference data  
I
V

DRM

≤
800 V  
I
I

GT

≤
5 mA  
I
I

TSM

≤
12.5 A (t = 20 ms)  
I
I

T(RMS)

≤
1 A  
I
I

GT

≤
7 mA (T2
−
G+)  
2. Pinning
 
information  
Table 1.  
Pinning  
Pin  
1
Description  
Simplified outline  
Graphic symbol  
main terminal 2 (T2)  
gate (G)  
T2  
T1  
G
2
3
main terminal 1 (T1)  
sym051  
3
2
1
SOT54A  

OT407  
NXP Semiconductors  
Four-quadrant triac, enhanced noise immunity  
3. Ordering
 
information  
Table 2.  
Ordering information  
Type number  
Package  
Name  
–
Description  
plastic single-ended leaded (through hole) package; 3 leads (wide pitch)  
Version  
OT407  
SOT54A  
4. Limiting
 
values  
Table 3.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
V

DRM  

Parameter  
Conditions  
Min  
Max  
800  
800  
1
Unit  
repetitive peak off-state voltage  
repetitive peak reverse voltage  
RMS on-state current  
–
–
–
V
V
A
V

RRM  

I

T(RMS)  

full sine wave; T

lead

≤
38
°
C; see  
Figure 4
and
5  
I

TSM  

non-repetitive peak on-state current
 
full sine wave; T

j

= 25
°
C prior to  
surge; see
Figure 2
and
3  
t = 20 ms  
–
–
–
12.5  
13.8  
1.28  
A
t = 16.7 ms  
A
A

2

s  
I

2

t  
I

2

t for fusing  
t

p

= 10 ms  
dI

T

/dt  
rate of rise of on-state current  
I

TM

= 1 A; I

G

= 20 mA;  
dI

G

/dt = 0.2 A/
µ
s  
T2+ G+  
T2+ G
−  
T2
−
G
−  
T2
−
G+  
–
50  
50  
50  
10  
1
A/
µ
s  
A/
µ
s  
A/
µ
s  
A/
µ
s  
A
–
–
–
I

GM  

peak gate current  
peak gate power  
–
P

GM  

P

G(AV)  

T

stg  

T

j  

–
2
W
average gate power  
storage temperature  
junction temperature  
over any 20 ms period  
–
0.1  
+150  
125  
W
−
40  
°
C  
–
°
C  
OT407_1  
© NXP B.
V
.
2
008. All rights reserved.  
Product data sheet  
Rev. 01 — 19 May 2008  
2 of 12  

OT407  
NXP Semiconductors  
Four-quadrant triac, enhanced noise immunity  
003aac259  
2.0  
conduction form  
P

tot  

angle  
factor  
a
(W)  
(degrees)  
1.6  
1.2  
0.8  
0.4  
0.0  
30  
60  
90  
120  
180  
4
α
= 180
°  
2.8  
2.2  
1.9  
1.57  
α
120
°  
90
°  
60
°  
30
°  
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
I

T(RMS)

(A)  
α
= conduction angle  
Fig 1.
 
Total power dissipation as a function of RMS on-state current; maximum values  
003aac260  
16  
I

TSM  

(A)  
12  
8
I
I
TSM  
t
T
4
1/f  
= 25
°
C max  
T
j(init)  
0
1
10  
10

2  

10

3  

number of cycles  
f = 50 Hz  
Fig 2.
 
Non-repetitive peak on-state current as a function of the number of sinusoidal current cycles; maximum  
values  
OT407_1  
© NXP B.
V
.
2
008. All rights reserved.  
Product data sheet  
Rev. 01 — 19 May 2008  
3 of 12  

OT407  
NXP Semiconductors  
Four-quadrant triac, enhanced noise immunity  
003aac262  
10

3  

I
I
TSM  
t
T
I

TSM  

(A)  
t
p
10

2  

T
= 25
°
C max  
j(init)  
(1)  
(2)  
10  
1
10

-5  

10

-4  

10

-3  

10

-2  

10

-1  

t

p

(s)  
t

p

≤
20 ms  
(1) dI

T

/dt limit  
(2) T2
−
G+ quadrant limit  
Fig 3.
 
Non-repetitive peak on-state current as a function of pulse width; maximum values  
003aac263  
003aac264  
16  
I

T(RMS)  

(A)  
1.2  
I

T(RMS)  

(A)  
12  
0.8  
8
0.4  
4
0
0
-50  
10

-2  

10

-1  

1
10  
0
50  
100  
150  

lead

(
°
C)  
T
surge duration (s)  
f = 50 Hz  
T

lead

= 38
°
C  
Fig 4.
 
RMS on-state current as a function of surge  
duration; maximum values  
Fig 5.
 
RMS on-state current as a function of solder  
point temperature; maximum values  
OT407_1  
© NXP B.
V
.
2
008. All rights reserved.  
Product data sheet  
Rev. 01 — 19 May 2008  
4 of 12  

OT407  
NXP Semiconductors  
Four-quadrant triac, enhanced noise immunity  
5. Thermal
 
characteristics  
Table 4.  
Symbol  
R

th(j-lead)  

Thermal characteristics  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
thermal resistance from junction to
 
full cycle; see
Figure 6  
lead  
–
–
60  
K/W  
R

th(j-a)  

thermal resistance from junction to
 
full cycle; printed-circuit  
–
150  
–
K/W  
ambient  
board mounted; lead  
length = 4 mm  
003aac206  
2
10  
Z
th(j-lead)  
(K/W)  
10  
1
P
−
1  
10  
t
t
p
−
2  
10  
−
5  
−
4  
−
3  
−
2  
−
1  
10  
10  
10  
10  
1
10  
10  
t
(s)  
p
Fig 6.
 
Transient thermal impedance from junction to lead as a function of pulse width  
OT407_1  
© NXP B.
V
.
2
008. All rights reserved.  
Product data sheet  
Rev. 01 — 19 May 2008  
5 of 12  

OT407  
NXP Semiconductors  
Four-quadrant triac, enhanced noise immunity  
6. Static
 
characteristics  
Table 5.  
Static characteristics  
T

j

= 25
°
C unless otherwise specified.  
Symbol Parameter
 
Conditions  
I

GT

gate trigger current  
Min  
Typ  
Max  
Unit  
V

D

= 12 V; I

T

= 0.1 A; see
Figure 8  
T2+ G+  
0.25  
0.25  
0.25  
0.35  
–
–
–
–
5
5
5
7
mA  
mA  
mA  
mA  
T2+ G
−  
T2
−
G
−  
T2
−
G+  
I

L  

latching current  
V

D

= 12 V; I

G

= 0.1 A; see
Figure 10  
T2+ G+  
–
–
10  
25  
10  
10  
10  
1.6  
1.3  
–
mA  
mA  
mA  
mA  
mA  
V
T2+ G
−  
–
–
T2
−
G
−  
–
–
T2
−
G+  
–
–
I

H  

holding current  
V

D

= 12 V; I

G

= 0.1 A; see
Figure 11  
I

T

= 1 A; see
Figure 9  
V

D

= 12 V; I

T

= 0.1 A; see
Figure 7  
V

D

= V

DRM

; I

T

= 0.1 A; T

j

= 125
°
C  
V

D

= V

DRM(max)

; T

j

= 125
°
C  
–
–
V

T  

V

GT  

on-state voltage  
gate trigger voltage  
–
1.3  
–
–
–
–
V
0.2  
–
V
I

D  

off-state current  
0.5  
mA  
OT407_1  
© NXP B.
V
.
2
008. All rights reserved.  
Product data sheet  
Rev. 01 — 19 May 2008  
6 of 12  

OT407  
NXP Semiconductors  
Four-quadrant triac, enhanced noise immunity  
7. Dynamic
 
characteristics  
Table 6.  
Dynamic characteristics  
Symbol Parameter  
Conditions  
Min  
Typ  
Max Unit  
dV

D

/dt  
rate of rise of off-state voltage
 
V

DM

= 0.67V

DRM(max)

; T

j

= 110
°
C; exponential  
20  
–
–
V/
µ
s  
waveform; gate open circuit  
dV

com

/dt rate
 
of change of  
commutating voltage  
V

DM

= 400 V; T

j

= 110
°
C; I

TM

= 1 A;  
dI

com

/dt = 0.44 A/ms  
1
–
–
V/
µ
s  
003aaa209  
003aaa205  
1.6  
4
V
I
GT  
GT  
I
GT(25
°
C)  
V
GT(25
°
C)  
1.2  
3
(1)  
(2)  
(3)  
(4)  
0.8  
0.4  
0
2
1
0
−5
0  
0
50  
100  
150  
−
50  
0
50  
100  
150  
T (
°
C)  
j
T (
°
C)  
j
(1) T2+
 
G+  
(2) T2+
 
G
−  
(3) T2
−
G
−  
(4) T2
−
G+  
Fig 7.
 
Normalized gate trigger voltage as a function  
of junction temperature  
Fig 8.
 
Normalized gate trigger current as a function  
of junction temperature  
OT407_1  
© NXP B.
V
.
2
008. All rights reserved.  
Product data sheet  
Rev. 01 — 19 May 2008  
7 of 12  

OT407  
NXP Semiconductors  
Four-quadrant triac, enhanced noise immunity  
003aac258  
003aaa203  
3
2
I

T  

I
L
(A)  
I
L(25
°
C)  
1.6  
2
1.2  
0.8  
(1)  
(2)  
(3)  
1
0.4  
0
0
−
50  
0
0.4  
0.8  
1.2  
1.6  
2
0
50  
100  
150  
V

T

(V)  
T (
°
C)  
j
V

o

= 1.254 V; R

s

= 0.31
Ω  
(1) T

j

= 125
°
C; typical values  
(2) T

j

= 125
°
C; maximum values  
(3) T

j

= 25
°
C; maximum values  
Fig 9.
 
On-state current as a function of on-state  
voltage  
Fig 10.
 
Normalized latching current as a function of  
junction temperature  
003aaa204  
3
I
H
I
H(25
°
C)  
2
1
0
−
50  
0
50  
100  
150  
T (
°
C)  
j
Fig 11.
 
Normalized holding current as a function of junction temperature  
OT407_1  
© NXP B.
V
.
2
008. All rights reserved.  
Product data sheet  
Rev. 01 — 19 May 2008  
8 of 12  

OT407  
NXP Semiconductors  
Four-quadrant triac, enhanced noise immunity  
8. Package
 
outline  
Plastic single-ended leaded (through hole) package; 3 leads (wide pitch)  
SOT54A  
c
E
A
L
d
L
b
2
1
e
1
e
D
2
3
b
1
L
1
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(1)  
L
1
UNIT  
A
b
b
c
D
d
E
e
e
L
L
2
1
1
max.  
5.2  
5.0  
0.48  
0.40  
0.66  
0.55  
0.45  
0.38  
4.8  
4.4  
1.7  
1.4  
4.2  
3.6  
14.5  
12.7  
3
2
mm  
5.08  
2.54  
3
Note  
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
97-05-13  
04-06-28  
SOT54A  
Fig 12.
 
Package outline SOT54A  
OT407_1  
© NXP B.
V
.
2
008. All rights reserved.  
Product data sheet  
Rev. 01 — 19 May 2008  
9 of 12  

OT407  
NXP Semiconductors  
Four-quadrant triac, enhanced noise immunity  
9. Revision
 
history  
Table 7.  
Revision history  
Document ID  
Release date  
Data sheet status  
Change notice  
Supersedes  
OT407_1  
20080519  
Product data sheet  
–
–
OT407_1  
© NXP B.
V
.
2
008. All rights reserved.  
Product data sheet  
Rev. 01 — 19 May 2008  
10 of 12  

OT407  
NXP Semiconductors  
Four-quadrant triac, enhanced noise immunity  
10. Legal information  
10.1 Data
 
sheet status  
Document status

[1][2]  

Product status

[3]  

Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet
 
Qualification  
Product [short] data sheet
 
Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL

.  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
10.2 Definitions  
Draft —
The document is a draft version onl
y
.
T
he content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications —
Applications that are described herein for any of these  
products are for illustrative purposes onl
y
.
N
XP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Limiting values —
Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) may cause permanent  
damage to the device. Limiting values are stress ratings only and operation of  
the device at these or any other conditions above those given in the  
Characteristics sections of this document is not implied. Exposure to limiting  
values for extended periods may affect device reliabilit
y
.  
Short data sheet —
A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of sale —
NXP Semiconductors products are sold  
subject to the general terms and conditions of commercial sale, as published  
at

, including those pertaining to warrant
y
,  
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of  
any inconsistency or conflict between information in this document and such  
terms and conditions, the latter will prevail.  
10.3 Disclaimers  
General —
Information in this document is believed to be accurate and  
reliable. However, NXP Semiconductors does not give any representations or  
warranties, expressed or implied, as to the accuracy or completeness of such  
information and shall have no liability for the consequences of use of such  
information.  
No offer to sell or license —
Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Right to make changes —
NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
Quick reference data —
The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Suitability for use —
NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in medical, militar
y
,
a
ircraft,  
space or life support equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injur
y
,
d
eath or severe property or environmental  
10.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
11. Contact information  
For more information, please visit:

For sales office addresses, please send an email to:

OT407_1  
© NXP B.
V
.
2
008. All rights reserved.  
Product data sheet  
Rev. 01 — 19 May 2008  
11 of 12  

OT407  
NXP Semiconductors  
Four-quadrant triac, enhanced noise immunity  
12. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . .
 
1  
1.1  
1.2  
1.3  
1.4  
General description. . . . . . . . . . . . . . . . . . . . . .
 
1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
1  
Applications .
 
. . . . . . . . . . . . . . . . . . . . . . . . . .
 
1  
Quick reference data. . . . . . . . . . . . . . . . . . . . .
 
1  
2
3
4
5
6
7
8
9
Pinning informatio
n
. . . . . . . . . . . . . . . . . . . . . .
 
1  
Ordering informatio
n
. . . . . . . . . . . . . . . . . . . . .
 
2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . .
 
2  
Thermal characteristics. . . . . . . . . . . . . . . . . . .
 
5  
Static characteristics. . . . . . . . . . . . . . . . . . . . .
 
6  
Dynamic characteristics . . . . . . . . . . . . . . . . . .
 
7  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . .
 
9  
Revision histor
y
. . . . . . . . . . . . . . . . . . . . . . . .
 
1
0  
10  
Legal information. . . . . . . . . . . . . . . . . . . . . . .
 
11  
Data sheet status . . . . . . . . . . . . . . . . . . . . . .
 
11  
Definition
s
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
1
1  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
11  
T
r
ademark
s
. . . . . . . . . . . . . . . . . . . . . . . . . . .
 
1
1  
10.1  
10.2  
10.3  
10.4  
11  
12  
Contact informatio
n
. . . . . . . . . . . . . . . . . . . . .
 
11  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
 
12  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.
V
.
 
2
008.  
All rights reserved.  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 19 May 2008  
Document identifier: OT407_1