Winsok-Semicon-WSF40N06
| Part # | Winsok-Semicon-WSF40N06 |
Download  | Winsok-Semicon-WSF40N06 |
WS
F
40N06
N-Ch MOSFET
General Description
Product Summery
The WSF40N
06
is the highest performance trench
N-Ch MOSFET
with extreme high cell density ,
which provide excellent RDSON and gate charge
for most of the synchronous buck converter
applications .
BVDSS
RDSON
ID
60V
20
m
Ω
50
A
Applications
The WSF40N06 meet the RoHS and Green
Product requirement
, 100% EAS guaranteed with
full function
reliability approved.
z
High Frequency Point-of-Load Synchronous
Buck Converter for MB/NB/UMPC/VGA
z
Networking DC-DC Power System
z
LCD/LED back light
Features
TO
–
252 Pin Configuration
z
Advanced high cell density Trench technology
z
Super Low Gate Charge
z
Excellent CdV/dt effect decline
z
100% EAS Guaranteed
z
Green Device Available
Absolute Maximum Ratings
Symbol
V
DS
Parameter
Rating
60
Units
V
Drain-Source Voltage
V
GS
Gate-Sou
r
ce Voltage
±
20
50
V
I
D
@T
C
=25
℃
I
D
@T
C
=100
℃
I
D
@T
A
=25
℃
I
D
@T
A
=70
℃
I
DM
Continuous Drain Current, V
GS
@ 10V
1
Continuous Drain Current, V
GS
@ 10V
1
Continuous Drain Current, V
GS
@ 10V
1
Continuous Drain Current, V
GS
@ 10V
1
Pulsed Drain Current
2
A
32
A
10
A
8
A
200
42
A
EAS
Single Pulse Avalanche Energy
3
mJ
A
I
AS
Avalanche Current
28
P
D
@T
C
=25
℃
P
D
@T
A
=25
℃
T
STG
Total Power Dissipation
4
Total Power Dissipation
4
53
W
W
℃
℃
3.5
Storage
T
e
mperature Range
Operating Junction Temperature Range
-55 to 150
-55 to 150
T
J
Thermal Data
Symbol
R
θ
JA
Parameter
Typ.
—
Max.
62
Unit
℃
/W
℃
/W
Thermal Resistance Junction-Ambient
1
Thermal Resistance Junction-Case
1
2
R
θ
JC
—
Dec.2014
Page 1
WS
F
40N06
N-Ch MOSFET
Electrical Characteristics (T
J
=25
℃
, unless otherwise noted)
Symbol
Parameter
Conditions
V
GS
=0V , I
D
=250uA
Min.
60
—
—
—
1.2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Typ.
—
Max.
—
Unit
V
BV
DSS
Drain-Source Breakdown Voltage
BV
DSS
Temperature Coefficient
△
BV
DSS
/△
T
J
Reference to 25
℃
, I
D
=1mA
V
GS
=10V , I
D
=20A
0.057
20
—
V/
℃
23
R
DS(ON)
Static Drain-Source On-Resistance
2
m
Ω
28
23
V
GS
=4.5V , I
D
=10A
V
GS(th)
Gate Threshold Voltage
1.8
-5.68
—
2.5
—
V
V
GS
=V
DS
, I
D
=250uA
△
V
GS(th)
V
GS(th)
Temperature Coefficient
mV/
℃
V
DS
=48V , V
GS
=0V , T
J
=25
℃
V
DS
=48V , V
GS
=0V , T
J
=55
℃
1
I
DSS
Drain-Source Leakage Current
uA
—
5
V
GS
=
±
20V , V
DS
=0V
I
GSS
gfs
Gate-Source Leakage Current
Forward Transconductance
Gate Resistance
—
±
100
—
nA
S
V
DS
=5V , I
D
=15A
9
1.7
28
R
g
V
DS
=0V , V
GS
=0V , f=1MHz
3.4
36
Ω
Q
g
Total Gate Charge (4.5V)
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
V
DS
=
30
V , V
GS
=4.5V , I
D
=15A
nC
ns
Q
gs
Q
gd
T
d(on)
T
r
3.5
6.5
7.2
38
10
1
5
14.4
90
V
DD
=30V , V
GS
=10V , R
G
=3.3
Ω
,
I
D
=15A
T
d(off)
T
f
Turn-Off Delay Time
Fall Time
34
73
8.2
1680
115
85
15.2
2578
203
136
C
iss
C
oss
C
rss
Input Capacitance
V
DS
=15V , V
GS
=0V , f=1MHz
pF
Output Capacitance
Reverse Transfer Capacitance
Guaranteed Avalanche Characteristics
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
EAS
Single Pulse Avalanche Energy
5
19
—
—
mJ
V
DD
=25V , L=0.1mH , I
AS
=15A
Diode Characteristics
Symbol
Parameter
Conditions
Min.
—
Typ.
—
Max.
50
Unit
A
I
S
I
SM
V
SD
t
rr
Continuous Source Current
1,6
Pulsed Source Current
2,6
Diode Forward Voltage
2
Reverse Recovery Time
Reverse Recovery Charge
V
G
=V
D
=0V , Force Current
—
—
200
1
A
—
—
V
V
GS
=0V , I
S
=
1
A , T
J
=25
℃
—
19.6
14.2
—
nS
nC
IF=1A ,dI/dt=100A/µs,TJ=25
℃
Q
rr
—
—
Note :
1.
The data tested by surface mounted on a 1 inch2 FR-4 board with 2OZ copper,t<10sec.
2.The data tested by pulsed , pulse width
≦
300us , duty cycle
≦
2%
The EAS data shows Max. rating . The test condition is V
DD
=25V,V
GS
=10V,L=0.1mH,I
AS
=15A
3.
4.The power dissipation is limited by 150
℃
junction temperature
5.The Min. value is 100% EAS tested guarantee.
6.The data is theoretically the same as I
D
and I
DM
, in real applications , should be limited by total power dissipation.
Dec.2014
Page
2
WS
F
40N06
N-Ch MOSFET
Typical Characteristics
20
19
18
17
16
15
I
D
=
20
A
4
6
8
10
V
GS
(V)
Fig.2 On-Resistance v.s Gate-Source
Fig.1 Typical Output Characteristics
12
10
8
6
T =150
T =25
℃
J
℃
J
4
2
0
0.2
0.4
0.6
0.8
1
V
SD
, Source-to-Drain Voltage (V)
Fig.3
Fig.4 Gate-Charge Characteristics
Forward Characteristics of Reverse
2.0
1.5
1.0
0.5
1.5
1
0.5
0
-50
0
50
100
150
-50
0
50
100
150
T ,
Junction Temperature (
)
℃
J
T ,Junction
Temperature (
)
℃
J
Fig.6 Normalized R
DSON
v.s T
J
Fig.5 Normalized V
GS(th)
v.s T
J
Dec.2014
Page
3
WS
F
40N06
N-Ch MOSFET
10000
1000
100
F=1.0
M
Hz
Ciss
Coss
Crss
10
1
5
9
13
17
21
25
V
DS
Drain to Source Voltage(V)
Fig.7 Capacitance
Fig.8 Safe Operating Area
1
DUTY=0.5
0.3
0.1
0.1
0.05
0.02
P
DM
D = T
ON
/T
T
ON
T
0.01
S
I
NGLE PULSE
T
J
peak = T
C
+ P
DM
x R
θ
JC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Pulse Width (s)
Fig.9 Normalized Maximum Transient Thermal Impedance
Fig.11 Unclamped Inductive Switching Waveform
Fig.10 Switching Time Waveform
Dec.2014
Page
4
Attention
ꢀ
1,
ꢀ
Any
ꢀ
and
ꢀ
all
ꢀ
Winsok
ꢀ
power
ꢀ
products
ꢀ
described
ꢀ
or
ꢀ
contained
ꢀ
herein
ꢀ
do
ꢀ
not
ꢀ
have
ꢀ
specifications
ꢀ
that
ꢀ
can
ꢀ
handle
ꢀ
applications
ꢀ
that
ꢀ
require
ꢀ
extremely
ꢀ
high
ꢀ
levels
ꢀ
of
ꢀ
reliability,
ꢀ
such
ꢀ
as
ꢀ
life
Ͳ
support
ꢀ
systems,
ꢀ
aircraft’s
ꢀ
control
ꢀ
systems,
ꢀ
or
ꢀ
other
ꢀ
applications
ꢀ
whose
ꢀ
failure
ꢀ
can
ꢀ
be
ꢀ
reasonably
ꢀ
expected
ꢀ
to
ꢀ
result
ꢀ
in
ꢀ
serious
ꢀ
physical
ꢀ
and/or
ꢀ
material
ꢀ
damage.
ꢀ ꢀ
Consult
ꢀ
with
ꢀ
your
ꢀ
Winsok
ꢀ
power
ꢀ
representative
ꢀ
nearest
ꢀ
you
ꢀ
before
ꢀ
using
ꢀ
any
ꢀ
Winsok
ꢀ
power
ꢀ
products
ꢀ
described
ꢀ
or
ꢀ
contained
ꢀ
herein
ꢀ
in
ꢀ
such
ꢀ
applications.
ꢀ
2,Winsok
ꢀ
power
ꢀ
assumes
ꢀ
no
ꢀ
responsibility
ꢀ
for
ꢀ
equipment
ꢀ
failures
ꢀ
that
ꢀ
result
ꢀ
from
ꢀ
using
ꢀ
products
ꢀ
at
ꢀ
values
ꢀ
that
ꢀ
exceed,
ꢀ ꢀ
even
ꢀ
momentarily,
ꢀ
rated
ꢀ
values
ꢀ
(such
ꢀ
as
ꢀ
maximum
ꢀ
ratings,
ꢀ
operating
ꢀ
condition
ꢀ
ranges,
ꢀ
or
ꢀ
other
ꢀ
parameters)
ꢀ
listed
ꢀ
in
ꢀ
products
ꢀ
specifications
ꢀ
of
ꢀ
any
ꢀ
and
ꢀ
all
ꢀ
Winsok
ꢀ
power
ꢀ
products
ꢀ
described
ꢀ
or
ꢀ
contained
ꢀ
herein.
ꢀ
3,
ꢀ
Specifications
ꢀ
of
ꢀ
any
ꢀ
and
ꢀ
all
ꢀ
Winsok
ꢀ
power
ꢀ
products
ꢀ
described
ꢀ
or
ꢀ
contained
ꢀ
herein
ꢀ
stipulate
ꢀ
the
ꢀ
performance,
ꢀ
characteristics,
ꢀ
and
ꢀ
functions
ꢀ
of
ꢀ
the
ꢀ
described
ꢀ
products
ꢀ
in
ꢀ
the
ꢀ
independent
ꢀ
state,
ꢀ
and
ꢀ
are
ꢀ
not
ꢀ
guarantees
ꢀ
of
ꢀ
the
ꢀ
performance,
ꢀ
characteristics,
ꢀ
and
ꢀ
functions
ꢀ
of
ꢀ
the
ꢀ
described
ꢀ
products
ꢀ
as
ꢀ
mounted
ꢀ
in
ꢀ
the
ꢀ
customer’s
ꢀ
products
ꢀ
or
ꢀ
equipment.
ꢀ
T
o
ꢀ
verify
ꢀ
symptoms
ꢀ
and
ꢀ
states
ꢀ
that
ꢀ
cannot
ꢀ
be
ꢀ
evaluated
ꢀ
in
ꢀ
an
ꢀ
independent
ꢀ
device,
ꢀ
the
ꢀ
customer
ꢀ
should
ꢀ
always
ꢀ
evaluate
ꢀ
and
ꢀ
test
ꢀ
devices
ꢀ
mounted
ꢀ
in
ꢀ
the
ꢀ
customer’s
ꢀ
products
ꢀ
or
ꢀ
equipment.
ꢀ
4,
ꢀ
Winsok
ꢀ
power
ꢀ
Semiconductor
ꢀ
CO.,
ꢀ
LTD.
ꢀ
strives
ꢀ
to
ꢀ
supply
ꢀ
high
Ͳ
quality
ꢀ
high
Ͳ
reliability
ꢀ
products.
ꢀ
However,
ꢀ
any
ꢀ
and
ꢀ
all
ꢀ
semiconductor
ꢀ
products
ꢀ
fail
ꢀ
with
ꢀ
some
ꢀ
probability.
ꢀ
It
ꢀ
is
ꢀ
possible
ꢀ
that
ꢀ
these
ꢀ
probabilistic
ꢀ
failures
ꢀ
could
ꢀ
give
ꢀ
rise
ꢀ
to
ꢀ
accidents
ꢀ
or
ꢀ
events
ꢀ
that
ꢀ
could
ꢀ
endanger
ꢀ
human
ꢀ
lives
ꢀ
that
ꢀ
could
ꢀ
give
ꢀ
rise
ꢀ
to
ꢀ
smoke
ꢀ
or
ꢀ
fire,
ꢀ
or
ꢀ
that
ꢀ
could
ꢀ
cause
ꢀ
damage
ꢀ
to
ꢀ
other
ꢀ
property.
ꢀ
When
ꢀ
designing
ꢀ
equipment,
ꢀ
adopt
ꢀ
safety
ꢀ
measures
ꢀ
so
ꢀ
that
ꢀ
these
ꢀ
kinds
ꢀ
of
ꢀ
accidents
ꢀ
or
ꢀ
events
ꢀ
cannot
ꢀ
occur.
ꢀ
Such
ꢀ
measures
ꢀ
include
ꢀ
but
ꢀ
are
ꢀ
not
ꢀ
limited
ꢀ
to
ꢀ
protective
ꢀ
circuits
ꢀ
and
ꢀ
error
ꢀ
prevention
ꢀ
circuits
ꢀ
for
ꢀ
safe
ꢀ
design,
ꢀ
redundant
ꢀ
design,
ꢀ
and
ꢀ
structural
ꢀ
design.
ꢀ
5,In
ꢀ
the
ꢀ
event
ꢀ
that
ꢀ
any
ꢀ
or
ꢀ
all
ꢀ
Winsok
ꢀ
power
ꢀ
products(including
ꢀ
technical
ꢀ
data,
ꢀ
services)
ꢀ
described
ꢀ
or
ꢀ
contained
ꢀ
herein
ꢀ
are
ꢀ
controlled
ꢀ
under
ꢀ
any
ꢀ
of
ꢀ
applicable
ꢀ
local
ꢀ
export
ꢀ
control
ꢀ
laws
ꢀ
and
ꢀ
regulations,
ꢀ
such
ꢀ
products
ꢀ
must
ꢀ
not
ꢀ
be
ꢀ
exported
ꢀ
without
ꢀ
obtaining
ꢀ
the
ꢀ
export
ꢀ
license
ꢀ
from
ꢀ
the
ꢀ
authorities
ꢀ
concerned
ꢀ
in
ꢀ
accordance
ꢀ
with
ꢀ
the
ꢀ
above
ꢀ
law.
ꢀ
6,
ꢀ
No
ꢀ
part
ꢀ
of
ꢀ
this
ꢀ
publication
ꢀ
may
ꢀ
be
ꢀ
reproduced
ꢀ
or
ꢀ
transmitted
ꢀ
in
ꢀ
any
ꢀ
form
ꢀ
or
ꢀ
by
ꢀ
any
ꢀ
means,
ꢀ
electronic
ꢀ
or
ꢀ
mechanical,
ꢀ
including
ꢀ
photocopying
ꢀ
and
ꢀ
recording,
ꢀ
or
ꢀ
any
ꢀ
information
ꢀ
storage
ꢀ
or
ꢀ
retrieval
ꢀ
system,
ꢀ
or
ꢀ
otherwise,
ꢀ
without
ꢀ
the
ꢀ
prior
ꢀ
written
ꢀ
permission
ꢀ
of
ꢀ
Winsok
ꢀ
power
ꢀ
Semiconductor
ꢀ
CO.,
ꢀ
LTD.
ꢀ
7,
ꢀ
Information
ꢀ
(including
ꢀ
circuit
ꢀ
diagrams
ꢀ
and
ꢀ
circuit
ꢀ
parameters)
ꢀ
herein
ꢀ
is
ꢀ
for
ꢀ
example
ꢀ
only;
ꢀ
it
ꢀ
is
ꢀ
not
ꢀ
guaranteed
ꢀ
for
ꢀ
volume
ꢀ
production. Winsok
ꢀ
power
ꢀ
believes
ꢀ
information
ꢀ
herein
ꢀ
is
ꢀ
accurate
ꢀ
and
ꢀ
reliable,
ꢀ
but
ꢀ
no
ꢀ
guarantees
ꢀ
are
ꢀ
made
ꢀ
or
ꢀ
implied
ꢀ
regarding
ꢀ
its
ꢀ
use
ꢀ
or
ꢀ
any
ꢀ
infringements
ꢀ
of
ꢀ
intellectual
ꢀ
property
ꢀ
rights
ꢀ
or
ꢀ
other
ꢀ
rights
ꢀ
of
ꢀ
third
ꢀ
parties.
ꢀ
8,
ꢀ
Any
ꢀ
and
ꢀ
all
ꢀ
information
ꢀ
described
ꢀ
or
ꢀ
contained
ꢀ
herein
ꢀ
are
ꢀ
subject
ꢀ
to
ꢀ
change
ꢀ
without
ꢀ
notice
ꢀ
due
ꢀ
to
ꢀ
product/technology
ꢀ
improvement,etc.
ꢀ
When
ꢀ
designing
ꢀ
equipment,
ꢀ
refer
ꢀ
to
ꢀ
the
ꢀ
“Delivery
ꢀ
Specification”
ꢀ
for
ꢀ
the
ꢀ
Winsok
ꢀ
power
ꢀ
product
ꢀ
that
ꢀ
you
ꢀ ꢀ
Intend
ꢀ
to
ꢀ
use.
ꢀ
9,
ꢀ
this
ꢀ
catalog
ꢀ
provides
ꢀ
information
ꢀ
as
ꢀ
of
ꢀ
Sep.2014. Specifications
ꢀ
and
ꢀ
information
ꢀ
herein
ꢀ
are
ꢀ
subject
ꢀ
to
ꢀ
change
ꢀ
without
ꢀ
notice.
ꢀ
