AD9852 IC Chip

AD9852(CMOS 300 MSPS Complete DDS)

Introduction

The AD9852 digital synthesizer is a highly flexible device that addresses a wide range of applications. The device consists of an NCO with a 48-bit phase accumulator, a programmable reference clock multiplier, an inverse sinc filter, a digital multiplier, two 12-bit/300 MHz DACs, a high speed analog comparator, and an interface logic. This highly integrated device can be configured to serve as a synthesized LO agile clock generator and FSK/BPSK modulator. The theory of operation for the functional blocks of the device and a technical description of the signal flow through a DDS device is provided by Analog Devices, Inc., in the tutorial A Technical Tutorial on Digital Signal Synthesis. The tutorial also provides basic applications information for a variety of digital synthesis implementations.

Features

• 300 MHz internal clock rate
• FSK, BPSK, PSK, chirp, AM operation
• Dual integrated 12-bit D/A converters
• Ultrahigh speed comparator, 3 ps rms jitter
• Excellent dynamic performance
• 80 dB SFDR at 100 MHz (±1 MHz) A_out
• 4x to 20x programmable reference clock multiplier
• Dual 48-bit programmable frequency registers
• Dual 14-bit programmable phase offset registers
• 12-bit programmable amplitude modulation and on/off output shaped keying function
• Single-pin FSK and BPSK data interfaces
• PSK capability via I/O interface
• Linear or nonlinear FM chirp functions with single pin frequency hold function
• Frequency ramped FSK
• <25 ps rms total jitter in clock generator mode
• Automatic bidirectional frequency sweeping
• Sin(x)/x correction
• Simplified control interface
  -10 MHz serial 2-wire or 3-wire SPl-compatible
  -100 MHz parallel 8-bit programming
• 3.3 V single supply
• Multiple power-down functions
• Single-ended or differential input reference clock
• Small, 80-lead LQFP or TQFP with exposed pad

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